The present invention relates to a semiconductor memory with a semiconductor pellet on which electrode pads are arranged for connecting the integrated circuit of the pellet to a package and a wiring substrate. More particularly, in various kinds of packages including a ball grid array (BGA) package and a chip scale package (CSP) implementing a multipin configuration and desirable in the mounting aspect, the present invention is concerned with a semiconductor memory having a unique electrode pad arrangement which allows a single pellet to be mounted on a package face up or face down, as desired.
Generally, the pin arrangements of packages are standardized in the semiconductor industry including the users of semiconductor memories and vendors. If a BGA package directed toward a miniature product and a CSP directed toward a further miniature product are compatible with respect to the pin arrangement, then the CSP can be substituted for the BGA package in order to reduce the mounting area, as needed. In such a case, whether a pellet should be mounted on a package face up, i.e., with its front facing the same side as the front of the package or whether it should be mounted on a package face down, i.e., with its front facing the opposite side to the front of the package is sometimes unconditionally determined by the kind of the package. Specifically, a pellet is, in many cases, mounted on a BGA package face up and mounted on a CSP face down.
Japanese Patent Laid-Open Publication No. 63-267598, for example, discloses a semiconductor device allowing pad electrodes assigned to the same function to be connected to the outside terminals of a mounting substrate in either one of the face-up configuration and face-down configuration. Specifically, an electrode pad for the face-up position and an electrode pad for the face-down position are provided in a pellet for a single signal and electrically connected within the pellet. This device makes it needless to prepare different pellets each having a particular pad arrangement.
However, the semiconductor device taught in the above document has some problems left unsolved, as follows. The device doubles the number of electrode pads required and thereby increases the production cost as well as the area to be allocated to the pellet, compared to a pellet to be mounted only in a single position. For example, a thirty-two K words, thirty-six bit width SRAM (Static Random Access Memory) has sixty-two electrode pads relating to function pins, i.e., fifteen pads for addresses, thirty-six pads for data, and eleven pads for control. Taking the data function pins alone as an example, thirty-six additional pads are necessary in order to cope with both of face-up and face-down mounting, meaning an increase by about 60%. Further, an increase in the area of the pellet ascribable to wirings connecting the pads within the pellet is not negligible and has substantial influence on the production cost when it comes to products having small pellet areas, i.e., inexpensive general-purpose memories. In addition, as for a high-speed memory featuring high-speed access and high-speed operation, the wirings extending across the pellet critically aggravate a delay time. The above semiconductor device is therefore not feasible for inexpensive memory products or high-speed memory products.
To implement both of face-up mounting and face-down mounting with a single pellet, at least one additional wiring layer must be formed in the substrate of a CSP. This also results in an increase in the cost of a memory product.